1. Field of the Invention
Embodiments of the invention relates to the field of microprocessors, and more specifically, to communication protocol.
2. Description of Related Art
A bus interface between two processors or devices typically involves data transfers in both directions. For example, in a network processing system, a media processor may interface to a host processor to receive and transmit packets of data. The data transfers may be synchronous or asynchronous. A synchronous data transfer synchronizes the speed of the transmitting and the receiving processors. Synchronous data transfer mode is simple to design but is inflexible to accommodate different clock speeds or processor operating frequencies. An asynchronous data transfer allows processors with different clock frequencies to communicate with each other.
Existing asynchronous interface between two processors operating at different clock frequencies has a number of disadvantages. First, the control path is separated from the data path. This separation prohibits multiple transfers to occur back to back, reducing bus transfer bandwidth. Second, each time a different processor on one side is used, the signal connectivity has to be re-defined, creating difficulties in interfacing circuitry.